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Sheet目录3871

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2006 Microchip Technology Inc.

Preliminary

DS70178C-page 163

dsPIC30F1010/202X

15.2

Transmitting in 8-bit Data Mode

Set up the UART:

Write appropriate values for data, parity and

Stop bits.

Write appropriate baud rate value to the

U1BRG register.

Set up transmit and receive interrupt enable

and priority bits.

Enable the UART.

Set the UTXEN bit (causes a transmit interrupt).

Write data byte to lower byte of TXxREG word.

The value will be immediately transferred to the

Transmit Shift Register (TSR), and the serial bit

stream will start shifting out with next rising edge

of the baud clock.

Alternately, the data byte may be transferred

while UTXEN = 0, and then the user may set

UTXEN. This will cause the serial bit stream to

begin immediately because the baud clock will

start from a cleared state.

A transmit interrupt will be generated as per

interrupt control bit, UTXISELx.

15.3

Transmitting in 9-bit Data Mode

Set up the UART (as described in Section 15.2

“Transmitting in 8-bit Data Mode”).

Enable the UART.

Set the UTXEN bit (causes a transmit interrupt).

Write TXxREG as a 16-bit value only.

A word write to TXxREG triggers the transfer of

the 9-bit data to the TSR. Serial bit stream will

start shifting out with the first rising edge of the

baud clock.

A transmit interrupt will be generated as per the

setting of control bit, UTXISELx.

15.4

Break and Sync Transmit

Sequence

The following sequence will send a message frame

header made up of a Break, followed by an auto-baud

Sync byte.

Configure the UART for the desired mode.

Set UTXEN and UTXBRK – sets up the Break

character,

Load the TXxREG with a dummy character to

initiate transmission (value is ignored).

Write ‘55h’ to TXxREG – loads Sync character

into the transmit FIFO.

After the Break has been sent, the UTXBRK bit

is reset by hardware. The Sync character now

transmits.

15.5

Receiving in 8-bit or 9-bit Data

Mode

Set up the UART (as described in Section 15.2

“Transmitting in 8-bit Data Mode”).

Enable the UART.

A receive interrupt will be generated when one

or more data characters have been received as

per interrupt control bit, URXISELx.

Read the OERR bit to determine if an overrun

error has occurred. The OERR bit must be reset

in software.

Read RXxREG.

The act of reading the RXxREG character will move the

next character to the top of the receive FIFO, including

a new set of PERR and FERR values.

15.6

Built-in IrDA Encoder and Decoder

The UART has full implementation of the IrDA encoder

and decoder as part of the UART module. The built-in

IrDA encoder and decoder functionality is enabled

using the IREN bit U1MODE<12>. When enabled

(IREN = 1), the receive pin (U1RX) acts as the input

from the infrared receiver. The transmit pin (U1TX) acts

as the output to the infrared transmitter.

15.7

Alternate UART I/O Pins

An alternate set of I/O pins, U1ATX and U1ARX can be

used for communications. The alternate UART pins are

useful when the primary UART pins are shared by other

peripherals. The alternate I/O pins are enabled by set-

ting the ALTIO bit in the UxMODE register. If ALTIO =

, the U1ATX and U1ARX pins are used by the UART

module, instead of the U1TX and U1RX pins. If ALTIO

= 0, the U1TX and U1RX pins are used by the UART

module.

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